Electric double layer capacitors (EDLCs), which are commonly referred to in the art by the terms supercapacitors, ultracapacitors and electrochemical capacitors, can provide a relatively high capacitance in a relatively small package. EDLCs typically include a pair of electrodes separated by an electrolyte. Similar to conventional capacitors that are formed from, for example, conductive foils and a dry separator, a static charge can be stored by an EDLC by applying a voltage differential across the electrodes to allow electrical charge to “build up” in the capacitor. Common electrode materials include high surface area activated carbons, metal oxides and conductive polymers. The electrolyte can be aqueous or organic. EDLCs can have a capacitance from under 1 farad (e.g., about 0.005 F) to over 10,000 farads.
Unfortunately, the electrical characteristics of EDLCs have proven difficult to measure using techniques that are suitable for evaluating the electrical characteristics of conventional capacitors. Several attempts to measure the capacitance of EDLCs have been made. For example, R. B. Wright and T. C. Murphy, “Evaluation of Saft America, Inc. Electrochemical Capacitors,” Idaho National Engineering Laboratory, INEL/EXT-97-01414, December, 1997, describes a measurement approach where the capacitor is charged (or discharged) under constant current conditions. The time between two voltage points as the voltage across the capacitor changes is measured. Thereafter, the capacitance is mathematically calculated using the current, time and voltage difference. The disclosed calculation assumes that the capacitor can be represented by a model of an ideal capacitor. However, most, if not all, EDLCs are non-ideal capacitors and non-ideal capacitors cannot be easily represented by a simple model of an ideal capacitor. An ideal, or nonlinear, capacitor has a transferred charge characteristic that is single-valued. More specifically, ideal capacitors have a mean-charge characteristic or a peak-charge characteristic that is not linear, or a reversible capacitance that varies with bias voltage. The Wright publication also describes an ESR measurement where the result is generated by mathematical calculations involving current and voltage differences.
U.S. Pat. No. 6,275,047 describes another technique for measuring capacitance. In particular, a processor is used to multiply a differential time value by the constant current and divide the product by a differential voltage value to arrive at a capacitance value.
As should be apparent, measurement systems that rely on mathematical computations require some sort of processor that has been programmed to carry out the computations. As such, there is a need in the art for simplified systems and methods for measuring the electrical characteristics of EDLCs, such as systems and method that do not include performing mathematical computations (e.g., multiplication and/or division) and have reduced reliance on a model of an ideal capacitor.